include $(NOODLYBOX_HOME)/etc/makerule

CPROGRAM=accessfpga
TOP_UNIT=tSAMPLEFPGA

FUSEFLAGS=-lib unisims_ver

all : $(TOP_UNIT).prj

clean :
	-rm -rf isim isim.tmp_save
	-rm -f  *.log *.log_back *.xwv *$(DOTEXE) *.prj $(CPROGRAM).tcl

makefile : ../isesimv_makefile
	cd .. && $(MAKE) isesimv/$@

$(TOP_UNIT).prj : ../create_isesimproj.tcl
	xtclsh $< verilog > $@

../c/$(CPROGRAM)$(DOTEXE) :
	cd ../c && $(MAKE)

$(CPROGRAM).tcl : makefile
	echo set ::specified \"-c ../c/$(CPROGRAM)\" > $@
	echo set hdl verilog >> $@
	echo source $(COLON_NOODLYBOX_HOME)/tcl/fsm.tcl >> $@
	echo quit >> $@

$(CPROGRAM).xwv : $(TOP_UNIT)$(DOTEXE) $(CPROGRAM).tcl ../c/$(CPROGRAM)$(DOTEXE)
	./$< -tclbatch $(CPROGRAM).tcl -wavefile $@

view : $(CPROGRAM).xwv
	isimwave $<
