# sparse-switch

## Purpose

Jump to a new instruction based on the value in the given register, using an ordered table of value-offset pairs, or fall through to the next instruction if there is no match.

Note: The address of the table is guaranteed to be even (that is, 4-byte aligned). If the code size of the method is otherwise odd, then an extra code unit is inserted between the main code and the table whose value is the same as a nop.

## Details

Op & Format | Mnemonic / Syntax | Arguments
--- | --- | ---
2c 31t | sparse-switch vAA, +BBBBBBBB (with supplemental data as specified below in "`sparse-switch` Format") | `A:` register to test `B:` signed "branch" offset to table data (32 bits)

## Constraints

- A must be a valid register index in the current stack frame.
- Let PC be the address of the packed-switch instruction in the code array of the current method. Then T = PC + B with the following properties:
  - T must be 4-byte-aligned.
  - T must be in the same method.
  - T must point to a sparse-switch data table.

## Behavior

- The value of vA is used as a lookup key inside the sparse table data.
- If there exists an I with 0 <= I < table.size such that table.keys[I] = vA, then the jump target is determined as follows:
  - PC' = PC + table.targets[I].
  - Execution will resume at this address.
- Otherwise execution continues at the instruction following the sparse-switch statement.

## Exceptions

None.

## Notes

The low-to-high ordering of the keys allows the VM to employ binary search for the lookup, resulting in O(log table.size) comparisons.